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rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ADP1073 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1997 micropower dcCdc converter adjustable and fixed 3.3 v, 5 v, 12 v functional block diagrams set v in gain block/ error amp comparator sw2 fb gnd sw1 ao i lim oscillator driver a1 a2 212mv reference ADP1073 ADP1073 set v in gain block/ error amp comparator sw2 sense gnd sw1 ao i lim oscillator driver a1 a2 212mv reference ADP1073-3.3 ADP1073-5 ADP1073-12 r2 904k v r1 ADP1073-3.3: r1 = 62.1k v ADP1073-5: r1 = 40k v ADP1073-12: r1 = 16.3k v ADP1073-3.3, 5, 12 features operates at supply voltages from 1.0 v to 30 v ground current 100 m a works in step-up or step-down mode very few external components required low battery detector on-chip user-adjustable current limit internal 1 a power switch fixed and adjustable output voltage versions 8-lead dip or so-8 package applications single-cell to 5 v converters laptop and palmtop computers pagers cameras battery backup supplies cellular telephones portable instruments 4 maC20 ma loop powered instruments hand-held inventory computers general description the ADP1073 is part of a family of step-up/step-down switch- ing regulators that operates from an input supply voltage of as little as 1.0 v. this extremely low input voltage allows the ADP1073 to be used in applications requiring use of a single cell battery as the primary power source. the ADP1073 can be configured to operate in either step-up or step-down mode but for input voltages greater than 3 v, the adp1173 is recommended. an auxiliary gain amplifier can serve as a low battery detector or linear regulator. quiescent current on the ADP1073-5 is only 100 m a unloaded, making it ideal for systems where long battery life is required. the ADP1073 can deliver 40 ma at 5 v from an input voltage range as low as 1.25 v, or 10 ma at 5 v from a 1.0 v input. current limiting is available by adding an external resistor.
C2C rev. 0 ADP1073Cspecifications (@ t a = 0 8 c to +70 8 c, v in = 1.5 v unless otherwise noted) parameter conditions symbol min typ max units quiescent current switch off i q 100 165 m a quiescent current, step-up no load, ADP1073-3.3 i q 100 m a mode configuration ADP1073-5 100 m a ADP1073-12, t a = +25 c 100 m a input voltage step-up mode v in 1.15 12.6 v step-up mode, t a = +25 c 1.0 12.6 v step-down mode 30 v comparator trip point voltage ADP1073 1 200 212 222 mv output sense voltage ADP1073-3.3 2 v out 3.14 3.30 3.47 v ADP1073-5 2 4.75 5.00 5.25 v ADP1073-12 2 11.4 12.00 12.6 v comparator hysteresis ADP1073 5 10 mv output hysteresis ADP1073-3.3 90 130 mv ADP1073-5 125 250 mv ADP1073-12 300 600 mv oscillator frequency f osc 14 19 24 khz maximum duty cycle full load (v fb < v ref ) dc 577280 % switch on time t on 28 38 50 m s feedback pin bias current ADP1073 v fb = 0 v i fb 60 300 na set pin bias current v set = v ref i set 100 220 na ao output low i ao = 100 m av ao 0.15 0.4 v reference line regulation 1.0 v v in 1.5 v 0.35 %/v 1.5 v v in 12 v 0.05 0.15 %/v switch saturation voltage v in = 1.5 v, i sw = 400 ma, +25 cv cesat 300 450 mv step-up mode t min to t max 600 mv v in = 1.5 v, i sw = 500 ma, +25 c 400 550 mv t min to t max 750 mv v in = 5 v, i sw = 1 a, +25 c 700 1000 mv t min to t max 1500 mv a2 error amp gain r l = 100 k w 3 a v 400 1000 v/v reverse battery current 4 t a = +25 ci rev 750 ma current limit 220 w between i lim and v in t a = +25 ci lim 400 ma current limit temperature coefficient C0.3 %/ c switch-off leakage current measured at sw1 pin t a = +25 ci leak 115 m a maximum excursion below gnd i sw1 10 m a, switch off t a = +25 cv sw2 C400 C350 mv notes 1 this specification guarantees that both the high and low trip point of the comparator fall within the 200 mv to 222 mv range. 2 this specification guarantees that the output voltage of the fixed versions will always fall within the specified range. the w aveform at the sense pin will exhibit a sawtooth shape due to the comparator hysteresis. 3 100 k w resistor connected between a 5 v source and the ao pin. 4 the ADP1073 is guaranteed to withstand continuous application of +1.6 v applied to the gnd and sw2 pins while v in , i lim and sw1 pins are grounded. all limits at temperature extremes are guaranteed via correlation using standard quality control methods. specifications subject to change without notice.
ADP1073 C3C rev. 0 pin function descriptions pin mnemonic function 1i lim for normal conditions this pin is con- nected to v in . when a lower current limit is required, a resistor should be connected between i lim and v in. limit- ing the switch current to 400 ma is achieved by connecting a 220 w resistor. 2v in input voltage. 3 sw1 collector node of power transistor. for step-down configuration, connect to v in ; for step-up configuration, connect to an inductor/diode. 4 sw2 emitter node of power transistor. for step- down configuration, connect to inductor/diode; for step-up configura- tion, connect to ground. do not allow this pin to drop more than a diode drop below ground. 5 gnd ground. 6 ao auxiliary gain (gb) output. the open collector can sink 100 m a. 7 set gain amplifier input. the amplifiers positive input is connected to the set pin and its negative input is connected to the 212 mv reference. 8 fb/sense on the ADP1073 (adjustable) version this pin is connected to the comparator input. on the ADP1073-3.3, ADP1073- 5 and ADP1073-12, the pin goes di- rectly to the internal application resistor that sets output voltage. pin configurations 8-lead plastic dip 8-lead small outline package (n-8) (so-8) 1 2 3 4 8 7 6 5 top view (not to scale) ADP1073 i lim v in sw1 sw2 fb (sense)* set ao gnd * fixed versions 1 2 3 4 8 7 6 5 top view (not to scale) ADP1073 i lim v in sw1 sw2 fb (sense)* set ao gnd * fixed versions caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ADP1073 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings input supply voltage, step-up mode . . . . . . . . . . . . . . . 15 v input supply voltage, step-down mode . . . . . . . . . . . . . 36 v sw1 pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 v sw2 pin voltage . . . . . . . . . . . . . . . . . . . . . . . . .C0.4 v to v in feedback pin voltage (ADP1073) . . . . . . . . . . . . . . . . . . . 5 v switch current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5 a maximum power dissipation . . . . . . . . . . . . . . . . . . 500 mw operating temperature range (a) . . . . . . . . . . 0 c to +70 c storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature (soldering, 10 sec) . . . . . . . . . . . . +300 c i lim v in sw1 sense sw2 gnd ADP1073-5 caddell-burns 7200-12 82 m h 1n5818 +5v 40ma 100 m f sanyo os-con 1.5v aa cell* operates with cell voltage $ 1.0v *add 10 m f decoupling capacitor if battery is more than 2 inches away from ADP1073 figure 1. typical application ordering guide output package model* voltage options** ADP1073an adj n-8 ADP1073ar adj so-8 ADP1073an-3.3 3.3 v n-8 ADP1073ar-3.3 3.3 v so-8 ADP1073an-5 5 v n-8 ADP1073ar-5 5 v so-8 ADP1073an-12 12 v n-8 ADP1073ar-12 12 v so-8 notes * *temperature range: 0 c to +70 c. **n = plastic dip; so = small outline package. warning! esd sensitive device
ADP1073 C4C rev. 0 Ctypical performance characteristics switch current C amps switch on voltage C volts 1.6 0.6 0 0.1 0.7 0.2 0.3 0.4 0.5 0.6 1.4 0.8 0.4 0.2 1.2 1 saturation voltage 2 1.8 0.05 figure 3. switch on voltage vs. switch current in step-down mode temperature C 8 c 120 40 2 40 085 25 70 90 70 60 50 110 80 100 set pin bias current C na figure 6. set pin bias current vs. temperature temperature C 8 c 70 68 2 40 085 25 70 58 56 66 64 62 60 duty cycle C % figure 9. duty cycle vs. temperature r lim C v switch current C ma 1400 600 0 10 1000 30 50 70 90 200 400 600 800 1200 1000 400 200 800 v in = 1.5v with l = 82 m h v in = 3v with l = 82 m h v in = 12v with l = 150 m h figure 4. maximum switch current vs. r lim temperature C 8 c 160 140 40 2 40 085 25 70 80 60 120 100 supply current C m a v in = 1.5v figure 7. supply current vs. temperature temperature C 8 c 34.5 30 2 40 085 25 70 32 31.5 31 30.5 34 33.5 33 32.5 switch-on time C m s figure 10. switch on time vs. temperature switch current C amps 0.1 0.2 1.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.6 0 1 0.8 0.4 0.2 v ce (sat) C volts v in = 1.5v v in = 5.0v v in = 3.0v v in = 2.0v v in = 1.25v v in = 1.0v figure 2. saturation voltage vs. switch current in step-up mode input voltage C volts 1000 0 1 3.5 100 10 for v in > 1.6v, r lim = 68 v 1.5 2 2.5 3 output current C ma figure 5. guaranteed minimum output current at v out = 5 v vs. input voltage temperature C 8 c oscillator frequency C khz 22 21 2 40 085 25 70 17 16 15 14 20 19 18 figure 8. oscillator frequency vs. temperature
ADP1073 C5C rev. 0 temperature C 8 c 2300 2100 1100 2 40 085 25 70 1900 1700 1500 1300 v in = 1.5v r l = 100k v gain block gain C v/v figure 11. gain block gain vs. temperature theory of operation the ADP1073 is a flexible, low power switch mode power supply (smps) controller. the regulated output voltage can be greater than the input voltage (boost or step-up mode) or less than the input (buck or step-down mode). this device uses a gated-oscillator technique to provide very high performance with low quiescent current. a functional block diagram of the ADP1073 is shown on the front page. the internal 212 mv reference is connected to one input of the comparator, while the other input is externally connected (via the fb pin) to a feedback network connected to the regulated output. when the voltage at the fb pin falls below 212 mv, the 19 khz oscillator turns on. a driver amplifier pro- vides base drive to the internal power switch and the switching action raises the output voltage. when the voltage at the fb pin exceeds 212 mv, the oscillator is shut off. while the oscillator is off, the ADP1073 quiescent current is only 100 m a. the com- parator includes a small amount of hysteresis, which ensures loop stability without requiring external components for fre- quency compensation. the maximum current in the internal power switch can be set by connecting a resistor between v in and the i lim pin. when the maximum current is exceeded, the switch is turned off. the current limit circuitry has a time delay of about 2 m s. if an external resistor is not used, connect i lim to v in . further infor- mation on i lim is included in the limiting the switch current section of this data sheet. the ADP1073 internal oscillator provides 38 m s on and 15 m s off times, which is ideal for applications where the ratio be- tween v in and v out is roughly a factor of three (such as gener- ating +5 v from a single 1.5 v cell). wider range conversions, as well as step-down converters, can also be accomplished with a slight loss in the maximum output power that can be obtained. an uncommitted gain block on the ADP1073 can be connected as a low-battery detector, linear post-regulator or undervoltage lockout detector. the inverting input of the gain block is inter- nally connected to the 212 mv reference. the noninverting input is available at the set pin. a resistor divider, connected between v in and gnd with the junction connected to the set pin, causes the ao output to go low when the input voltage goes below the low battery set point. the ao output is an open collector npn transistor that can sink 100 m a. the ADP1073 provides external connections for both the col- lector and emitter of its internal power switch, which permits both step-up and step-down modes of operation. for the step- up mode, the emitter (pin sw2) is connected to gnd and the collector (pin sw1) drives the inductor. for step-down mode, the emitter drives the inductor while the collector is connected to v in . the output voltage of the ADP1073 is set with two external resistors. three fixed-voltage models are also available: ADP1073-3.3 (+3.3 v), ADP1073-5 (+5 v) and ADP1073-12 (+12 v). the fixed-voltage models are identical to the ADP1073, except that laser-trimmed voltage-setting resistors are included on the chip. only three external components are required to form a +3.3 v, +5 v or +12 v converter. on the fixed-voltage models of the ADP1073, simply connect the feedback pin (pin 8) directly to the output voltage. the ADP1073 oscillator only turns on when the output voltage is below the programmed voltage. when the output voltage is above the programmed voltage, the ADP1073 remains in its quiescent state to conserve power. output ripple, which is in- herent in gated oscillator converters, is typically 125 mv for a 5 v output and 300 mv for a 12 v output. this ripple voltage can be greatly reduced by inserting the gain-block between the output and the fb pin. further information and a typical circuit are shown in the programming the gain block section.
ADP1073 C6C rev. 0 component selection general notes on inductor selection when the ADP1073 internal power switch turns on, current begins to flow in the inductor. energy is stored in the inductor core while the switch is on, and this stored energy is then trans- ferred to the load when the switch turns off. both the collector and the emitter of the switch transistor are accessible on the ADP1073, so the output voltage can be higher, lower or of opposite polarity than the input voltage. to specify an inductor for the ADP1073, the proper values of inductance, saturation current and dc resistance must be deter- mined. this process is not difficult, and specific equations for each circuit configuration are provided in this data sheet. in general terms, however, the inductance value must be low enough to store the required amount of energy (when both input voltage and switch on time are at a minimum) but high enough that the inductor will not saturate when both v in and switch on time are at their maximum values. the inductor must also store enough energy to supply the load without satu- rating. finally, the dc resistance of the inductor should be low so that excessive power will not be wasted by heating the windings. for most ADP1073 applications, an 82 m h to 1000 m h inductor with a saturation current rating of 300 ma to 1 a is suitable. ferrite core inductors that meet these specifica- tions are available in small, surface-mount packages. to minimize electro-magnetic interference (emi), a toroid or pot core type inductor is recommended. rod core inductors are a lower cost alternative if emi is not a problem. calculating the inductor value selecting the proper inductor value is a simple three-step process: 1. define the operating parameters: minimum input voltage, maximum input voltage, output voltage and output current. 2. select the appropriate conversion topology (step-up, step- down or inverting). 3. calculate the inductor value, using the equations in the following sections. inductor selectionstep-up converter in a step-up, or boost, converter (figure 15), the inductor must store enough power to make up the difference between the input voltage and the output voltage. the power that must be stored is calculated from the equation: p l = v out + v d v in ( min ) () i out () (1) where v d is the diode forward voltage ( ? 0.5 v for a 1n5818 schottky). energy is only stored in the inductor while the ADP1073 switch is on, so the energy stored in the inductor on each switching cycle must be must be equal to or greater than: p l f osc (2) in order for the ADP1073 to regulate the output voltage. when the internal power switch turns on, current flow in the inductor increases at the rate of: i l ( t ) = v in r 1 e r t l ? ? ? ? (3) where l is in henrys and r' is the sum of the switch equivalent resistance (typically 0.8 w at +25 c) and the dc resistance of the inductor. if the voltage drop across the switch is small com- pared to v in , a simpler equation can be used: i l ( t ) = v in l t (4) replacing t in the above equation with the on time of the ADP1073 (38 m s, typical) will define the peak current for a given inductor value and input voltage. at this point, the inductor energy can be calculated as follows: e l = 1 2 l i 2 peak (5) as previously mentioned, e l must be greater than p l /f osc so the ADP1073 can deliver the necessary power to the load. for best efficiency, peak current should be limited to 1 a or less. higher switch currents will reduce efficiency because of increased satu- ration voltage in the switch. high peak current also increases output ripple. as a general rule, keep peak current as low as possible to minimize losses in the switch, inductor and diode. in practice, the inductor value is easily selected using the equa- tions above. for example, consider a supply that will generate 5 v at 25 ma from two alkaline batteries with a 2 v end-of-life voltage. the inductor power required is, from equation 1: p l = (5 v + 0.5 v 2 v ) (25 ma ) = 87.5 mw on each switching cycle, the inductor must supply: p l f osc = 87.5 mw 19 khz = 4.6 m j since the inductor power is low, the peak current can also be low. assuming a peak current of 100 ma as a starting point, equation 4 can be rearranged to recommend an inductor value: l = v in i l ( max ) t = 2 v 100 ma 38 m s = 760 m h substituting a standard inductor value of 470 m h, with 1.2 w dc resistance, will produce a peak switch current of: i peak = 2 v 2.0 w 1 e 2.0 w 38 m s 470 m h ? ? ? ? ? = 149 ma once the peak current is known, the inductor energy can be calculated from equation 5: e l = 1 2 (470 m h ) (149 ma ) 2 = 5. 2 m j the inductor energy of 5.2 m j is greater than the p l /f osc re- quirement of 4.6 m j, so the 470 m h inductor will work in this application. the optimum inductor value can be determined by substituting other inductor values into the same equations. when selecting an inductor, the peak current must not exceed the maximum switch current of 1.5 a. the peak current must be evaluated for both minimum and maximum values of input voltage. if the switch current is high when v in is at its minimum, then the 1.5 a limit may be exceeded at the maximum value of v in . in this case, the ADP1073s current
ADP1073 C7C rev. 0 limit feature can be used to limit switch current. simply select a resistor (using figure 4) that will limit the maximum switch current to the i peak value calculated for the minimum value of v in . this will improve efficiency by producing a constant i peak as v in increases. see the limiting the switch current section of this data sheet for more information. note that the switch current limit feature does not protect the circuit if the output is shorted to ground. in this case, current is limited only by the dc resistance of the inductor and the forward voltage of the diode. inductor selectionstep-down converter the step-down mode of operation is shown in figure 16. unlike the step-up mode, the ADP1073s power switch does not satu- rate when operating in the step-down mode. switch current should therefore be limited to 600 ma for best performance in this mode. if the input voltage will vary over a wide range, the i lim pin can be used to limit the maximum switch current. the first step in selecting the step-down inductor is to calculate the peak switch current as follows: i peak = 2 i out dc v out + v d v in v sw + v d ? ? ? ? (6) where dc = duty cycle (0.72 for the ADP1073) v sw = voltage drop across the switch v d = diode drop (0.5 v for a 1n5818) i out = output current v out = the output voltage v in = the minimum input voltage as previously mentioned, the switch voltage is higher in step- down mode than in step-up mode. v sw is a function of switch current and is therefore a function of v in , l, time and v out . for most applications, a v sw value of 1.5 v is recommended. the inductor value can now be calculated: l = v in ( min ) v sw v out i peak t on (7) where t on = switch on time (38 m s) if the input voltage will vary (such as an application which must operate from a battery), an r lim resistor should be selected from figure 4. the r lim resistor will keep switch current con- stant as the input voltage rises. note that there are separate r lim values for step-up and step-down modes of operation. for example, assume that +3.3 v at 150 ma is required from a 9 v battery with a 6 v end-of-life voltage. deriving the peak current from equation 6 yields: i peak = 2 150 ma 0.72 3. 3 + 0.5 61.5 + 0.5 ? ? ? ? = 317 ma the peak current can than be inserted into equation 7 to calcu- late the inductor value: l = 61.53.3 317 ma 38 m s = 144 m h since 144 m h is not a standard value, the next lower standard value of 100 m h would be specified. to avoid exceeding the maximum switch current when the input voltage is at +9 v, an r lim resistor should be specified. inductor selectionpositive-to-negative converter the configuration for a positive-to-negative converter using the ADP1073 is shown in figure 17. as with the step-up converter, all of the output power for the inverting circuit must be supplied by the inductor. the required inductor power is derived from the formula: p l = | v out | + v d () i out () (8) the ADP1073 power switch does not saturate in positive-to- negative mode. the voltage drop across the switch can be modeled as a 0.75 v base-emitter diode in series with a 0.65 w resistor. when the switch turns on, inductor current will rise at a rate determined by: i l ( t ) = v l r ? 1 e r ? t l ? ? ? ? (9) where r ' = 0.65 w + r l(dc) v l = v in C 0.75 v for example, assume that a C5 v output at 75 ma is to be gen- erated from a +4.5 v to +5.5 v source. the power in the induc- tor is calculated from equation 8: p l = | - 5 v | + 0.5 v () (75 ma ) = 413 mw during each switching cycle, the inductor must supply the fol- lowing energy: p l f osc = 413 mw 19 khz = 21.7 m j using a standard inductor value of 330 m h, with 1 w dc resis- tance, will produce a peak switch current of: i peak = 4.5 v 0.75 v 0.65 w+ 1 w 1 e 1.65 w 38 m s 330 m h ? ? ? ? = 393 ma once the peak current is known, the inductor energy can be calculated from equation 9: e l = 1 2 (330 m h ) (393 ma ) 2 = 25.5 m j the inductor energy of 25.5 m j is greater than the p l /f osc requirement of 21.7 m j, so the 330 m h inductor will work in this application. the input voltage varies between only 4.5 v and 5.5 v in this example. therefore, the peak current will not change enough to require an r lim resistor and the i lim pin can be connected di- rectly to v in . care should be taken, of course, to ensure that the peak current does not exceed 800 ma.
ADP1073 C8C rev. 0 capacitor selection for optimum performance, the ADP1073s output capacitor must be carefully selected. choosing an inappropriate capacitor can result in low efficiency and/or high output ripple. ordinary aluminum electrolytic capacitors are inexpensive, but often have poor equivalent series resistance (esr) and equivalent series inductance (esl). low esr aluminum capacitors, specifically designed for switch mode converter applications, are also available, and these are a better choice than general purpose devices. even better performance can be achieved with tantalum capacitors, although their cost is higher. very low values of esr can be achieved by using os-con capacitors (sanyo corporation, san diego, ca). these devices are fairly small, available with tape-and-reel packaging and have very low esr. the effects of capacitor selection on output ripple are demon- strated in figures 12, 13 and 14. these figures show the output of the same ADP1073 converter, which was evaluated with three different output capacitors. in each case, the peak switch current is 500 ma and the capacitor value is 100 m f. figure 12 shows a panasonic hf-series radial aluminum electrolytic. when the switch turns off, the output voltage jumps by about 90 mv and then decays as the inductor discharges into the capacitor. the rise in voltage indicates an esr of about 0.18 w . in figure 13, the aluminum electrolytic has been replaced by a sprague 593d-series device. in this case the output jumps about 35 mv, which indicates an esr of 0.07 w . figure 14 shows an os-con sa series capacitor in the same circuit, and esr is only 0.02 w . figure 12. aluminum electrolytic figure 13. tantalum electrolytic figure 14. os-con capacitor if low output ripple is important, the user should consider using the adp3000. this device switches at 400 khz, and the higher switching frequency simplifies the design of the output filter. consult the adp3000 data sheet for additional details. all potential current paths must be considered when analyzing very low power applications, and this includes capacitor leakage current. os-con capacitors have leakage in the 5 m a to 10 m a range, which will reduce efficiency when the load is also in the microampere range. tantalum capacitors, with typical leakage in the 1 m a to 5 m a range, are recommended for very low power applications. diode selection in specifying a diode, consideration must be given to speed, forward voltage drop and reverse leakage current. when the ADP1073 switch turns off, the diode must turn on rapidly if high efficiency is to be maintained. schottky rectifiers, as well as fast signal diodes such as the 1n4148, are appropriate. the forward voltage of the diode represents power that is not deliv- ered to the load, so v f must also be minimized. again, schottky diodes are recommended. leakage current is especially impor- tant in low current applications, where the leakage can be a significant percentage of the total quiescent current. for most circuits, the 1n5818 is a suitable companion to the ADP1073. this diode has a v f of 0.5 v at 1 a, 4 m a to 10 m a leakage and fast turn-on and turn-off times. a surface mount version, the mbrs130t3, is also available. for applications where the ADP1073 is off most of the time, such as when the load is intermittent, a silicon diode may provide higher overall efficiency due to lower leakage. for example, the 1n4933 has a 1 a capability, but with a leakage current of less than 1 m a. the higher forward voltage of the 1n4933 reduces efficiency when the ADP1073 delivers power, but the lower leakage may outweigh the reduction in efficiency. for switch currents of 100 ma or less, a schottky diode such as the bat85 provides a v f of 0.8 v at 100 ma and leakage less than 1 m a. a similar device, the bat54, is available in an sot-23 package. even lower leakage, in the 1 na to 5 na range, can be obtained with a 1n4148 signal diode. general purpose rectifiers, such as the 1n4001, are not suitable for ADP1073 circuits. these devices, which have turn-on times of 10 m s or more, are too slow for switching power supply appli- cations. using such a diode just to get started will result in wasted time and effort. even if an ADP1073 circuit appears to function with a 1n4001, the resulting performance will not be indicative of the circuit performance when the correct diode is used.
ADP1073 C9C rev. 0 circuit operation, step-up (boost) mode in boost mode, the ADP1073 produces an output voltage that is higher than the input voltage. for example, +5 v can be derived from one alkaline cell (+1.5 v), or +12 v can be generated from a +5 v logic power supply. figure 15 shows an ADP1073 configured for step-up operation. the collector of the internal power switch is connected to the output side of the inductor, while the emitter is connected to gnd. when the switch turns on, pin sw1 is pulled near ground. this action forces a voltage across l1 equal to v in Cv ce(sat) and current begins to flow through l1. this current reaches a final value (ignoring second-order effects) of: i peak @ v in v ce ( sat ) l 38 m s where 38 m s is the ADP1073 switchs on time. 3 5 1 8 4 2 i lim v in sw1 fb sw2 gnd ADP1073 l1 d1 v out c1 *optional r3* r1 r2 v in figure 15. step-up mode operation when the switch turns off, the magnetic field collapses. the polarity across the inductor changes, current begins to flow through d1 into the load and the output voltage is driven above the input voltage. the output voltage is fed back to the ADP1073 via resistors r1 and r2. when the voltage at pin fb falls below 212 mv, sw1 turns on again and the cycle repeats. the output voltage is therefore set by the formula: v out = 212 mv 1 + r 1 r 2 ? ? ? ? the circuit of figure 15 shows a direct current path from v in to v out , via the inductor and d1. therefore, the boost converter is not protected if the output is short circuited to ground. circuit operation, step-down (buck) mode) the ADP1073s step-down mode is used to produce an output voltage that is lower than the input voltage. for example, the output of four nicd cells (+4.8 v) can be converted to a +3.3 v logic supply. a typical configuration for step-down operation of the ADP1073 is shown in figure 16. in this case, the collector of the internal power switch is connected to v in and the emitter drives the inductor. when the switch turns on, sw2 is pulled up toward v in . this forces a voltage across l1 equal to (v in C v ce ) C v out , and causes current to flow in l1. this current reaches a final value of: i peak @ v in v ce v out l 38 m s where 38 m s is the ADP1073 switchs on time. 5 1 8 4 2 i lim v in sw1 fb sw2 gnd ADP1073 l1 d1 1n5818 v out c2 r3 220 v r1 r2 v in 3 c1 figure 16. step-down mode operation when the switch turns off, the magnetic field collapses. the polarity across the inductor changes and the switch side of the inductor is driven below ground. schottky diode d1 then turns on and current flows into the load. notice that the absolute maximum rating for the ADP1073s sw2 pin is 0.5 v below ground. to avoid exceeding this limit, d1 must be a schottky diode. using a silicon diode in this application will generate forward voltages above 0.5 v, which will cause potentially dam- aging power dissipation within the ADP1073. the output voltage of the buck regulator is fed back to the ADP1073s fb pin by resistors r1 and r2. when the voltage at pin fb falls below 212 mv, the internal power switch turns on again and the cycle repeats. the output voltage is set by the formula: v out = 212 mv 1 + r 1 r 2 ? ? ? ? the output voltage should be limited to 6.2 v or less when using the ADP1073 in step-down mode. if the input voltage to the ADP1073 varies over a wide range, a current limiting resistor at pin 1 may be required. if a particular circuit requires high peak inductor current with minimum input supply voltage the peak current may exceed the switch maximum rating and/or saturate the inductor when the supply voltage is at the maximum value. see the limiting the switch current section of this data sheet for specific recommendations. positive-to-negative conversion the ADP1073 can convert a positive input voltage to a negative output voltage, as shown in figure 17. this circuit is essentially identical to the step-down application of figure 16, except that the output side of the inductor is connected to power ground. when the ADP1073s internal power switch turns off, current flowing in the inductor forces the output (Cv out ) to a negative i lim v in sw1 fb sw2 gnd ADP1073 l1 d1 1n5818 2 v out c2 r3 r2 r1 1 v in c1 figure 17. a positive-to-negative converter potential. the ADP1073 will continue to turn the switch on until its fb pin is 212 mv above its gnd pin, so the output voltage is determined by the formula:
ADP1073 C10C rev. 0 v out = 212 mv 1 + r 1 r 2 ? ? ? ? the design criteria for the step-down application also apply to the positive-to-negative converter. the output voltage should be limited to |6.2 v| and d1 must be a schottky diode to prevent excessive power dissipation in the ADP1073. negative-to-positive conversion the circuit of figure 18 converts a negative input voltage to a positive output voltage. operation of this circuit configuration is similar to the step-up topology of figure 16, except that the cur- rent through feedback resistor r1 is level-shifted below ground by a pnp transistor. the voltage across r1 is (v out C v be(q1) ). however, diode d2 level-shifts the base of q1 about 0.6 v below grou nd, thereby cancelling the v be of q1. the addition of d2 also reduces the circuits output voltage sensitivity to tempera- ture, which would otherwise be dominated by the C2 mv/ c v be contribution of q1. the output voltage for this circuit is deter- mined by the formula: v out = 212 mv 1 + r 1 r 2 ? ? ? ? unlike the positive step-up converter, the negative-to-positive converters output voltage can be either higher or lower than the input voltage. d1 1n5818 i lim v in sw1 fb sw2 gnd ADP1073 l1 d2 1n4148 c2 r lim r1 c l q1 2n3906 ao set nc nc r2 10k v positive output negative input figure 18. a negative-to-positive converter limiting the switch current the ADP1073s r lim pin permits the switch current to be lim- ited with a single resistor. this current limiting action occurs on a pulse by pulse basis. this feature allows the input voltage to vary over a wide range without saturating the inductor or ex- ceeding the maximum switch rating. for example, a particular design may require peak switch current of 800 ma with a 2.0 v input. if v in rises to 4 v, however, the switch current will exceed 1.6 a. the ADP1073 limits switch current to 1.5 a and thereby protects the switch, but the output ripple will increase. selecting the proper resistor will limit the switch current to 800 ma, even if v in increases. the relationship between r lim and maximum switch current is shown in figure 4. the i lim feature is also valuable for controlling inductor current when the ADP1073 goes into continuous conduction mode. this occurs in the step-up mode when the following condition is met: v out + v diode v in v sw < 1 1 dc where dc is the ADP1073s duty cycle. when this relationship exists, the inductor current does not go all the way to zero during the time that the switch is off. when the switch turns on for the next cycle, the inductor current begins to ramp up from the residual level. if the switch on time remains constant, the inductor current will increase to a high level (see figure 19). this increases output ripple and can require a larger inductor and capacitor. by controlling switch current with the i lim resistor, output ripple current can be main- tained at the design values. figure 20 illustrates the action of the i lim circuit. figure 19. (i lim operation, r lim = 0 w ) figure 20. (i lim operation, r lim = 240 w ) the internal structure of the i lim circuit is shown in figure 21. q1 is the ADP1073s internal power switch, which is paralleled by sense transistor q2. the relative sizes of q1 and q2 are scaled so that i q2 is 0.5% of i q1 . current flows to q2 through an internal 80 w resistor and through the r lim resistor. these two resistors parallel the base-emitter junction of the oscillator- disable transistor, q3. when the voltage across r1 and r lim exceeds 0.6 v, q3 turns on and terminates the output pulse. if only the 80 w internal resistor is used (i.e., the i lim pin is con- nected directly to v in ), the maximum switch current will be 1.5 a. figure 4 gives r lim values for lower current-limit values. the delay through the current limiting circuit is approximately 2 m s. if the switch on time is reduced to less than 5 m s, accu- racy of the current trip point is reduced. attempting to program a switch on time of 2 m s or less will produce spurious responses in the switch on time. however, the ADP1073 will still provide a properly regulated output voltage.
ADP1073 C11C rev. 0 oscillator v in sw2 sw1 r lim (external) driver i lim q1 ADP1073 q2 q3 r1 80 v (internal) figure 21. current limit operation programming the gain block the gain block of the ADP1073 can be used as a low battery detector, error amplifier or linear post regulator. the gain block consists of an op amp with pnp inputs and an open-collector npn output. the inverting input is internally connected to the ADP1073s 212 mv reference, while the noninverting input is available at the set pin. the npn output transistor will sink about 100 m a. figure 22a shows the gain block configured as a low-battery monitor. resistors r1 and r2 should be set to high values to reduce quiescent current, but not so high that bias current in the set input causes large errors. a value of 100 k w for r2 is a good compromise. the value for r1 is then calculated from the formula: r 1 = v lobatt - 212 mv 212 mv r 2 where v lobatt is the desired low battery trip point. since the gain block output is an open-collector npn, a pull-up resistor should be connected to the positive logic power supply. v in +5v gnd ADP1073 r1 ao set r2 100k v to processor 212mv ref v bat r1 = r2 ( C1 ) v lb 212mv v lb = battery trip point figure 22a. setting the low battery detector trip point v in +5v gnd ADP1073 r1 ao set r2 33k v 47k v to processor 212mv ref v bat r3 1.6m v figure 22b. adding hysteresis to the low battery detector the circuit of figure 22a may produce multiple pulses when approaching the trip point, due to noise coupled into the set input. to prevent multiple interrupts to the digital logic, hyster- esis can be added to the circuit (figure 22b). resistor r hys , with a value of 1 m w to 10 m w , provides the hysteresis. the addi- tion of r hys will change the trip point slightly, so the new value for r1 will be: r 1 = v lobatt 212 mv 212 mv r 2 ? ? ? ? v l 212 mv r l + r hys ? ? ? ? where v l is the logic power supply voltage, r l is the pull-up resistor and r hys creates the hysteresis. the gain block can also be used as a control element to reduce output ripple. the adp3000 is normally recommended for low- ripple applications, but its minimum input voltage is 2 v. the gain-block technique using the ADP1073 can be useful for step- up converters operating down to 1 v. a step-up converter using this technique is shown in figure 23. this configuration uses the gain block to sense the output volt- age and control the comparator. the result is that the compara- tor hysteresis is reduced by the open loop gain of the gain block. output ripple can be reduced to only a few millivolts with this technique, versus a typical value of 150 mv for a +5 v converter using just the comparator. for best results, a large output capacitor (1000 m f or more) should be specified. this tech- nique can also be used for step-down or inverting applications, but the adp3000 is usually a more appropriate choice. see the adp3000 data sheet for further details. d1 i lim v in sw1 fb sw2 gnd ADP1073 l1 r1 c1 ao r2 r3 680k v set v bat v out v out = ( +1 ) ( 212mv ) r1 r2 figure 23. using the gain block to reduce output ripple
ADP1073 C12C rev. 0 Ctypical application circuits 1 m f* 1m v v set v1 +12v 100 v v2 100 m f *non-polarized ADP1073 circuit i in = v2 C v1 100 v figure 24. test circuit measures no load quiescent current of ADP1073 converter 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 120 m h 1.00m v ** 47 m f 23.3k v ** 220 v fb 1.5 volt cell 9v output 5ma at v battery = 1.00v 12ma at v battery = 1.5v * l1 = gowanda ga10-123k or caddell-burns 7300-14 ** 1% metal film figure 25. 1.5 v to 9 v step-up converter 1n5818 i lim v in sw1 sw2 gnd ADP1073-5 l1 * 68 m h 100 m f 56 v sense two 1.5 volt cells 5v output 100ma at v battery = 2.0v * l1 = gowanda ga10-682k or caddell-burns 7300-11 figure 26. 3 v to 5 v step-up converter 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 120 m h 536k v ** 100 m f 40.2k v ** 220 v fb 1.5 volt cell 3v output 15ma at v battery = 1.00v * l1 = gowanda ga10-123k or caddell-burns 7300-14 ** 1% metal film figure 27. 1.5 v to 3 v step-up converter 1n5818 i lim v in sw1 sw2 gnd ADP1073-12 l1 * 120 m h 47 m f sense 1.5 volt cell 12v output 5ma at v battery = 1.0v 12ma at v battery = 1.5v * l1 = gowanda ga10-123k or caddell-burns 7300-14 figure 28. 1.5 v to 12 v step-up converter 1n5818 i lim v in sw1 sw2 gnd ADP1073-12 l1 * 68 m h 47 m f 51 v sense two 1.5 volt cells 12v output 25ma at v battery = 2.0v * l1 = gowanda ga10-682k or caddell-burns 7300-11 figure 29. 3 v to 12 v step-up converter two 1.5 volt cells 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 68 m h 1.00m v ** 47 m f 14.3k v ** 51 v fb 15v output 20ma at v battery = 2.0v * l1 = gowanda ga10-682k or caddell-burns 7300-11 ** 1% metal film figure 30. 3 v to 15 v step-up converter 100 m f 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 150 m h 1m v ** 100 m f 14.3k v ** fb 15v output 100ma at 4.5 v in * l1 = gowanda ga10-153k or caddell-burns 7200-15 ** 1% metal film 5 v in figure 31. 5 v to 15 v step-up converter
ADP1073 C13C rev. 0 100 m f 1n5818 i lim v in sw1 sw2 gnd ADP1073-12 l1 * 150 m h 100 m f sense * l1 = gowanda ga20-153k or caddell-burns 7200-15 5 v in 12v output 100ma at 4.5 v in figure 32. 5 v to 12 v step-up converter 1n5818 l1 * 82 m h 100 m f 5v output shutdown operate 74c04 1n4148 40.2k v ** 1.5 volt cell 909k v ** * l1 = gowanda ga10-822k or caddell-burns 7200-12 ** 1% metal film i lim v in sw1 sw2 gnd ADP1073 fb figure 33. 1.5 v to 5 v step-up converter with logic shutdown * l1 = gowanda ga10-822k or caddell-burns 7300-12 ** 1% metal film 1n5818 i lim v in sw1 sw2 gnd ADP1073-5 l1 * 82 m h 100 m f sense 5v output 100k v ** 1.5 volt cell lo batt goes low at v battery = 1.15v 442k v ** ao set 7 100k v figure 34. 1.5 v to 5 v step-up converter with low battery detector *l1 = gowanda ga10-103k or caddell-burns 7300-13 1n5818 i lim v in sw1 sw2 gnd ADP1073 100 m f 220 v fb 9 volt battery 3v output l1 * 100 m h 536k v 40.2k v figure 35. 9 v to 3 v step-down converter * l1 = gowanda ga10-103k or caddell-burns 7300-13 1n5818 i lim v in sw1 sw2 gnd ADP1073-5 100 m f 220 v sense 9 volt battery 5v output l1 * 100 m h figure 36. 9 v to 5 v step-down converter * l1 = gowanda ga10-472k or caddell-burns 7300-14 minimum start-up voltage = 1.1v i lim v in sw1 sw2 gnd ADP1073-5 100 m f 56 v sense 1.5 volt cell 5v output 25ma l1 * 47 m h 2n3906 2.2 v 1n5818 figure 37. 1.5 v to 5 v bootstrapped step-up converter
ADP1073 C14C rev. 0 * l1 = gowanda ga10-822k or caddell-burns 7300-12 **1% metal film ***optional i lim v in sw1 sw2 gnd ADP1073 100 m f*** fb 1.5 volt cell 5v to memory 4.5v when main supply open 1n5818 l1 * 82 m h 40.2k v ** 806k v ** 5v main supply figure 38. memory backup supply 5v output 100ma lockout at 1.6v 51 v * l1 = gowanda ga10-682k or caddell-burns 7300-11 ** 1% metal film 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 68 m h fb 2.2m v 3 volt cell 100k v set 1m v ** 40.3k v ** 100 m f ao 2n3906 100k v 100k v 909k v ** figure 39. 3 v to 5 v step-up converter with undervoltage lockout 1.5 volt cell 5v output 20mv p-p ripple * l1 = gowanda ga10-822k or caddell-burns 7300-12 ** 1% metal film 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 82 m h fb 680k v set 909k v ** 40.2k v ** 100 m f os-con ao figure 40. 1.5 v to 5 v low noise step-up converter 1.5 volt cell 5v output 5ma at v battery = 1.00v * l1 = gowanda ga10-473k or caddell-burns 7300-21 ** 1% metal film efficiency = 83% at 5ma load 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 470 m h fb 680k v set 909k v ** 40.2k v ** 100 m f os-con ao 10mv p-p ripple figure 41. 1.5 v to 5 v very low noise step-up converter 5v out 90ma at 6.5v in * l1 = gowanda ga10-472k or caddell-burns 7300-09 ** 1% metal film efficiency = 80% i q = 130a output ripple = 100mv p-p 1n5818 i lim v in sw1 sw2 gnd ADP1073 l1 * 47 m h fb 680k v set 900k v ** 40.2k v ** 100 m f os-con ao 6.5v to 12v figure 42. 9 v to 5 v reduced noise step-down converter 51 v * l1 = coiltronics ctx25-5-52 ** 1% metal film i lim v in sw1 sw2 gnd ADP1073 560k v fb output +6v, 1a at v in = 3v l1 * 25 m h 2200 m f 10v mtp3055el 1000 m f 10v ao 549k v ** set 20k v ** 1n5818 5.1k v 2n3906 1n5820 input 3v to 6v (2 lithium cells) figure 43. 3 v to 6 v @ 1 a step-up converter
ADP1073 C15C rev. 0 8-lead plastic dip (n-8) 8 14 5 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) pin 1 seating plane 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) max 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) bsc 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 8-lead small outline package (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 outline dimensions dimensions shown in inches and (mm).
C16C c2965C8C10/97 printed in u.s.a.

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